Device physics and technology of advanced transistors and the process and device interplay that is critical for sub-100 nm metal oxide semiconductor (MOS) capacitors and field-effect transistors (MOSFETs) based microsystems design. Design of MOS interface circuits: relationships between processing choices and device performance characteristics. Long-channel device I-V review, short-channel MOSFET I-V characteristics including velocity saturation, mobility degradation, hot carriers, gate depletion. MOS device scaling strategies, silicon-on-insulator, lightly doped drain structures, on-chip interconnect parasitics and performance. Major CMOS scaling challenges. Process and circuit simulation.