CS 356 Hardware Accelerator Architectures
This seminar course explores aspects of hardware accelerator design and implementation. Historical contexts for hardware acceleration will be presented along with trends in modern accelerator architecture design approaches relating to parallelism, dataflow, and stream processing. Discussion on design and compilation for these accelerators will be explored. A number of application domains will be investigated, such as machine learning, bioinformatics, and graph processing. Students will engage through reading set papers and conducting a practical design project. By the end of this course, students will be well placed to conduct research on hardware accelerator architectures.